In digital circuit design, the emphasis for a long time has been onminimization of the number of gates or of the area. The powerconsumption of the chip has been important, but has not formed animportant part of the design procedure, or at least did not in the earlyyears. Now that consumer products are getting smaller, the power theyconsume has become very important, because many of these products dependon batteries.
The authors have directed their attention to designing a digitalcircuit with minimal power consumption. The problem can be stated asfollows: Given a Boolean function F(x 1,&ldots;,x n) of n variables, with the signal probabilities andtransition densities of its primary inputs, find a design with minimalpower consumption. The algorithms available in the literature areheuristic, based on iterative strategies. There are methods availablethat consider only signal probabilities. The paper modifies the Espressoalgorithm, which considers input signals with simultaneousswitching.
A heuristic for direction of expansion is developed and a“don’t care” set is exploited to reduce cube-switchingactivity. Section 2 of the paper gives basic definitions. The authorssuggest a method of estimating the signal probability of the outputs ofthe two-level logic circuit. Then the formula for the transition densityof a two-input AND gate for input signals with simultaneous switching isderived. The next section considers three power models, for staticprogrammable logic array (PLA), dynamic PLA, and AND-ORimplementation, respectively. The power consumption equation is given;power consumption must be minimized, and cost functions in each case arestated separately. Section 3 describes techniques for reducingtransition densities in order to reduce power consumption. Thesetechniques have been incorporated in the Espresso algorithm. The“expand” part of the algorithm is changed to include thedirection of cube expansion, which will help reduce transitiondensities. This is done by defining a lowering set and a raising set.The authors show how to develop a nonredundant cover by rejecting asmany redundant prime implicants as possible, then give ideas aboutdeveloping covers with minimum cardinality.
Section 4 gives the results of implementation and experiments onbenchmark circuits. Both static and dynamic PLA models are considered,and it is shown that the new methods substantially reduce powerconsumption. The paper is a valuable contribution to the field.
