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Fast optical reconfiguration of a nine-context DORGA using a speed adjustment control
Nakajima M., Watanabe M. ACM Transactions on Reconfigurable Technology and Systems4 (2):1-21,2011.Type:Article
Date Reviewed: Nov 30 2011

Since 2004, Watanabe, one of the authors, has been researching optically reconfigurable gate array (ORGA) architectures. This paper goes one step further, including dynamic configuration from multiple previously chosen contexts. A dynamic ORGA (DORGA) architecture includes a very-large-scale integration (VLSI) field-programmable gate array (FPGA)-like island-style gate array. To achieve high gate count, the gate array is programmed through photodiodes arranged in a scheme similar to dynamic random access memory (DRAM). To (re)set the configuration of the gate array, the authors use a holographic memory and a laser system.

The authors report that, besides resulting in a much higher gate density (reaching tens of thousands of gates) with respect to the previous versions (at most a few thousand gates), DORGA memory architecture presents an interesting reconfiguration (on the order of hundreds of nanoseconds) to retention (on the order of tens of microseconds) time ratio. However, such times are dependent on the context pattern used, and must be known in advance since they are used for managing the required refresh time periods.

Although this paper presents a very interesting approach to dynamic hardware reconfiguration, the main drawback is that the authors do not say anything about how the optical subsystem would be miniaturized to render the whole system commercially practical.

Reviewer:  Norian Marranghello Review #: CR139619 (1204-0375)
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Integrated Circuits (B.7 )
 
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