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Browse All Reviews > Hardware (B) > Register-Transfer-Level Implementation (B.5) > Design (B.5.1) > Styles (B.5.1...)
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1-7 of 7
Reviews about "Styles (B.5.1...)":
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Split-Path Enhanced Pipeline Scheduling
Shim S., Moon S. IEEE Transactions on Parallel and Distributed Systems 14(5): 447-462, 2003. Type: Article
Software pipelining is a technique used by modern compilers to generate high performance code for modern processors. This technique increases instruction-level parallelism in the generated code. The paper describes a new method for software...
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Dec 1 2003 |
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High Performance Rotation Architectures Based on the Radix-4 CORDIC Algorithm
Antelo E., Villalba J., Bruguera J., Zapata E. IEEE Transactions on Computers 46(8): 855-870, 1997. Type: Article
High-speed 3D graphic display applications require fast algorithms for vector rotation, with simple implementations. Coordinate Rotation Digital Computer (CORDIC) algorithms are one solution. In the past, such algorithms have usually used base 2...
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Jun 1 1998 |
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Design and realization of high-performance wave-pipelined 8  8 b multiplier in CMOS technology
Ghosh D., Nandy S. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 3(1): 36-48, 1995. Type: Article
A wave-pipelined 8-bit multiplier is presented. Its novelty lies in the use of a nonstatic variant of CMOS technology, NPCPL. The advantage of NPCPL over other technologies suitable for wave-pipelining, such as ECL and CML, is that it uses less...
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Nov 1 1996 |
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Advanced microprocessors
Tabak D., McGraw-Hill, Inc., New York, NY, 1991.Type: Book (9780070628076)
The purpose of this book is to serve as a graduate-level reference on state-of-the-art microprocessors. After a brief discussion of the general structure of microprocessors and computer architecture, the main portion of this book describes three...
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Oct 1 1992 |
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Microprocessors: a programmer’s view
Dewar R., Smosna M., McGraw-Hill, Inc., New York, NY, 1990.Type: Book (9789780070166387)
A graduate-level special topics course covering current developments in microprocessors, including both RISC and CISC architectures, is the basis of this outstanding text. The authors present 14 chapters of material. The first chapter gives a...
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Jul 1 1992 |
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Implementation of the PIPE Processor
Farrens M., Pleszkun A. Computer 24(1): 65-70, 1991. Type: Article
The authors give an exceedingly brief overview of the PIPE processor, describe a single-chip nMOS implementation, and discuss some of the implications of the implementation experience for the design of the processor. The chief novelty of the...
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Sep 1 1991 |
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Micropipelines
Sutherland I. Communications of the ACM 32(6): 720-738, 1989. Type: Article
Ivan Sutherland’s Turing Award lecture is important reading for computer designers. As used in this work, a micropipeline is a powerful combination of the concepts of pipelining, asynchronous sequential logic, and transition...
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Aug 1 1990 |
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