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The design and development of SPARC (videotape)
Patterson D., Rosing W., University Video Communications, Stanford, CA, 1989. Type: Book
Date Reviewed: Oct 1 1990

It would be hard to image a better person than David Patterson to make a videotape on RISC. He was a pioneer in this field of processor design and has remained at its leading edge. In addition, he is a competent speaker, is obviously relaxed in front of the camera, and can convey ideas without trivializing them or making them overly complicated.

This tape is part of a Distinguished Lecture Series of videotapes whose speakers include, besides Patterson, such luminaries as Seymour Cray and Gordon Bell. Most of the series is hardware-oriented; this tape is no exception.

While the tape’s title emphasizes SPARC, much of its content is generic to all RISC systems. Patterson begins by comparing RISC with CISC, with examples of CISC and RISC chips using comparable technologies. At the architectural level, he points out that longer RISC programs tell only half the memory usage story: while instruction traffic goes up for RISC over CISC, data traffic goes way down. As a result, the total quantity of memory-to-CPU traffic typically stays about the same, and the traffic becomes more regular. (Some might argue that comparing 1977 CISC architectures with 1987 RISC architectures is inherently unfair, even if they are implemented in comparable technologies, but I cannot think of a well-known 1987 CISC architecture he could have used.)

In comparing SPARC with other RISC architectures, Patterson stresses that, despite some differences, RISC architectures as a group resemble each other much more closely than do CISC architectures. He then discusses a wide range of SPARC implementations. He goes into three of them in detail--gate array, custom CMOS, and custom ECL--discussing all three at both the chip and the board levels. A videotape speaker can point out physical features directly, and Patterson uses this capability effectively.

Patterson also discusses the history and future of RISC. He gives full historical credit to IBM and to Seymour Cray, being perhaps overly modest about his own and his colleagues’ contributions. His predictions for the future are reasonable.

The tape ends with three questions from a small “studio audience,” whose members seem a trifle uncomfortable in this role. The first ten minutes of the tape, before Patterson appears, are given over to Wayne Rosing. He lacks Patterson’s ease on camera, but most viewers of this tape will be more interested in the ideas it contains than in the quality of the acting. Rosing provides some interesting background on the development of SPARC, including the nonobvious fact that Sun was a mere $30 million firm with 200 total employees when it embarked on the SPARC project. SPARC was truly a gutsy, “you bet your company” decision. In retrospect, it appears to have paid off.

This videotape is a priceless opportunity to hear about the origins and 1989 state of RISC “straight from the horse’s mouth.” Anyone with an interest in the field should view it at least once. At a cost of about $35, depending on the state to which it is shipped and ACM membership status, every corporation and educational institution with the slightest interest in computer architecture should have a copy in its library.

Reviewer:  E. Mallach Review #: CR114454
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Risc (C.1.1 ... )
 
 
Hardware (K.2 ... )
 
 
Microprocessors And Microcomputers (B.7.1 ... )
 
 
Microcomputers (C.5.3 )
 
 
Performance of Systems (C.4 )
 
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