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Programming the 29K RISC family
Mann D., Prentice-Hall, Inc., Upper Saddle River, NJ, 1993. Type: Book (9780130918932)
Date Reviewed: May 1 1995

The intended audience for this book is people developing software for the Advanced Micro Devices 29K family. The material is practical rather than theoretical, and the contents are typical of assembly-level texts for microprocessors. The text is well augmented with descriptive tables, figures, and assembly-level code stubs used as descriptive examples. The book consists of seven chapters, three appendices, and a well-populated index.

Chapter 1 describes the 29K architecture, including some discussion of pipeline dependencies, and describes the 29K simulator provided by AMD. Chapter 2 is devoted to applications programming, including C conventions, the runtime environment, compiler features, library support, C interrupt handlers, and utility programs. Chapter 3 covers assembly language programming, the 29K instruction set, and register use. Chapter 4 is a fairly detailed treatment of interrupts and traps, including nesting, queueing, lightweight interrupts, and context caching for both user and supervisory modes. Chapter 5 addresses operating systems issues associated with context switching and procedural linkage mechanisms for user and supervisor modes. Chapter 6 describes 29K memory management, including performance tradeoffs between static and dynamic RAM; translation lookaside buffering; and cache architecture and maintenance. Chapter 7 covers software debugging support tools, including their features, installation, and use. Appendix A describes the systems service calls introduced in chapter 2 in detail. AppendixB covers signaling services and processing. Appendix C defines software-assigned trap numbers.

This book is an adequate, but not noteworthy, reference to programming the 29K family. It is true to the form of most texts covering manufacturer-specific programming. The author’s definition of RISC--“I consider a processor to be RISC if it is microcode free and has a simple instruction execute-stage which can complete in a single cycle”--leaves much to be desired. In addition, instructions, address modes, and similar operations are mainly treated textually at some length. Crisper, better formed, and more compact descriptions would be more helpful. The index has plenty of entries, but loses much in context. For example, looking up addressing modes leads to a single sentence that indicates no need for elaborate addressing modes, rather than to a description of the range of addressing modes available. I suspect that this is a consequence of word processing–assisted indexing, which has a strong tendency to build large but useless indexes.

This work is not exemplary, nor is it particularly unworthy for those with a specific requirement to program the 29K family of processors. It is no worse and no better than most books intended to be programmers’ guides for specific models of microprocessors.

Reviewer:  Robert E. Mahan Review #: CR118173
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