This short paper provides an overview of the PowerPC, the new microprocessor architecture from the Apple, IBM, and Motorola consortium. While the major impact of this venture will probably be based on market forces at least as much as on technological forces, it is a milestone and a strong example of contemporary microprocessor architectures.

The PowerPC is a direct descendant of the historic IBM 801, the early pioneer from the mid-1970s of the most fundamental RISC ideas. This paper reviews these principles, and the general RISC/CISC concept interactions since then, which have resulted in modern architectures like the  PowerPC  that combine the two, to form what may well be called complex RISC (CRISC) architectures. Such CRISC approaches merge the best of both worlds, achieving high pipeline utilization even in the presence of compound instruction functionality. Some specific tradeoffs of this  design  balance are described, providing valuable insight into the feature definitions of this chip.

This paper reviews the ancestry, design principles and goals, and resultant architecture of the PowerPC. The design rationale and some of the corporate interactions guiding the process are described. The paper is a short but interesting survey of an important recent microprocessor design. While it is not actually a history, as the title says, and includes numerous dangling references to various technical features, it is an interesting complement to the rest of the technical papers in this special issue highlighting the PowerPC architecture.