The title of this book is deceptive; the book covers much more than POWER and PowerPC material. It describes the many variations of the POWER and PowerPC architectures as case studies for the wider purpose of a detailed look at modern RISC machines. It covers PC, workstation, and massively parallel implementations. The purpose of this book is tutorial. This text contains sufficient material for a graduate computer architecture course. The audience may be students, engineers, or teachers who want to update their knowledge of computer architecture. Each chapter has up-to-date references and examples on every page that describe the author’s points at the instruction set, multilevel architecture control flow, and timing levels.

Chapter 1 covers modern computer design concepts, such as pipelining and instruction scheduling techniques, and compares POWER and PowerPC with other modern computer systems. Chapter 2 describes the POWER architecture at the instruction set level, separating the instructions as they are laid out logically in POWER--into branch, fixed-point, and floating-point instructions. This chapter also describes memory protection and virtual address translation.

Chapters 3 through 5 cover the POWER1 implementation. Chapter 3 discusses the pipelined structure of the CPU, and the branch, fixed, and floating point units, depicting control flow at each pipe stage. Chapter 4 describes how branches and interrupts are implemented, with many instruction-set-level examples. Chapter 5 has a description of how instruction and data cache memory are exploited in the POWER1 that ranges from an overview to the implementation details. Chapter 6 updates the information in chapters 3 through 5 with respect to POWER2, the 1993 follow-on to the POWER1.

Chapters 7 through 9 describe the PowerPC architecture and the PowerPC 601 implementation. The PowerPC is compatible with the POWER architecture but has simpler hardware and supports a broader range of products. These three chapters use the same format as in chapters 3 through5.

Thus far, the book mostly covers processor-related topics. Chapter 10 focuses on main memory and I/O subsystems with respect to the PowerPC bus structure, multiprocessor systems, and the RS/6000 workstation (including clustered configurations). Chapter 11 compares the Power 601 and Alpha 21064 architectures, to show the tradeoffs between two different popular RISC architectures. The book also contains useful appendices that cover the IEEE 754 floating-point standard and the POWER and PowerPC instruction formats.

The book’s best feature is the figures. They could be used as is for viewgraphs to teach any computer architecture course. The references include the latest related books, papers, and standards that might otherwise be hard to find. It is refreshing to see such a complete, self-contained, current, and implementation-minded book.