For the last few years, reduced instruction set computer (RISC) architecture has been synonymous with faster and generally superior chip design, but I have seen little discussion of what RISC actually means. Staken analyzes RISC architecture and compares it with complex instruction set computer (CISC) architecture, as well as providing detailed descriptions of all the principal so-called RISC designs. This coverage is intended for graduate students and working design professionals and assumes knowledge of conventional machine design and instruction sets.
The tradeoffs between RISC (less complex, but more numerous, instructions) and CISC (more complex, but fewer, instructions) are presented well. As every designer knows, there are tradeoffs between software and hardware at every level of the design process. RISC represents only the latest attempt to optimize overall performance. From the user’s point of view, the legacy of previously developed software places a heavy constraint on all new developments, which is perhaps more important than any chip design considerations. If a new, fast chip spends its time emulating the previous generation of instructions, we may have gained nothing. Training users in better programming techniques could provide orders of magnitude improvement in performance--much greater than the factor of ten that is the best that can be hoped for in improved chip design. Nevertheless, I suppose hardware development must go on.
Staken provides not only a valuable study of RISC design, but an excellent study of current design in general, since the book covers most modern chips, including the SPARC, Alpha, PowerPC, and Pentium Pro. The publisher has promised an aggressive schedule of updates, due to the rapidity with which this field is changing, but the high price of this first offering does not augur well for student budgets. All the same, I highly recommend this book, and hope that it makes it into paperback. The publishers might also consider making it into an interactive CD-ROM, with simulations of the various processor designs.
