Computing Reviews
Today's Issue Hot Topics Search Browse Recommended My Account Log In
Review Help
Search
Surviving the design of a 200 MHz RISC microprocessor
Milutinovic V. (ed), IEEE Computer Society, Washington, DC, 1996. Type: Book (9780818673436)
Date Reviewed: Sep 1 1997

This textbook takes the reader through the theoretical and technical detail required in the design and implementation of the first DARPA-funded high-performance gallium arsenide VLSI RISC processor. The author has used the material in his own undergraduate courses, and it has been used in a number of universities throughout the world. It departs significantly from traditional texts in several respects, including a broader focus on the design activity, from initiation through a strong emphasis on lessons learned. The content is well organized and extremely well illustrated by logic and block diagrams, and is supported by an excellent set of references and a short but adequate index. It provides an in-depth treatment of the design thought process, beginning with theory, moving through validation of the theoretical and design principles, and finishing with a look backward at the experiences gained and lessons learned. The book is compact, but not easy to read, requiring diligence to extract the important design lessons. A highlight is the treatment of the silicon versus gallium arsenide technology-related design problems. Milutinović clearly presents the case for not simply implementing a gallium arsenide adder, for example, the same way it would be implemented in silicon. Instead, each architecture is examined along with its strengths and weaknesses before a design decision is made. This analysis spells out the need to rethink conventional wisdom, designs, and architecture when implementing a new technology. This can be extrapolated to the admonition that when any technology changes significantly, it would be wise to rethink the fundamental limitations before seizing on what appears to be an obvious design. As the author points out, some of the results are counterintuitive.

The book is organized into ten chapters and six appendices. Four of the appendices are reprints of previously published articles, the fifth contains acronyms and abbreviations, and the sixth is a short biography of the author. Chapter 1 contains a short description of the book, the goals of the DARPA project, and reprints of several articles about the project. Chapters 2, 3, and 4 provide background on the design methodology; an introduction to hardware description languages emphasizing ISP, which was used for the project; and standard VLSI cell design techniques.

The actual design material begins in chapter 5 with prefabrication design (schematic entry, logic/timing testing, placement, and routing using the software package CADDAS) along with the basic elements of postfabrication testing. The real heart of the book is in chapters 6 through 9. Chapter 6 describes RISC architectures using UCB-RISC and SU-MIPS as examples. Chapter 7, the best in the book, covers the design decision interactions between the RISC architecture and its VLSI implementation, with emphasis on gallium arsenide. Chapter 8 presents the interactions between the architecture and typical target applications, especially multimedia and neural computing. Chapter 9 covers the lessons learned on the project, some of which were delayed until well after the project was completed. Chapter 10 is a collection of references and suggested reading.

While the book is difficult to read, it is worthwhile. It contributes new material, especially in the context of the design decision process. Prospective readers should not be put off by the gallium arsenide context. The author’s attention to the design processes, tradeoffs, and rationale for decisions more than makes up for the subject treated being out of the current materials mainstream. Many of the ideas expressed can also apply in the world of silicon.

Reviewer:  Robert E. Mahan Review #: CR120831 (9709-0620)
Bookmark and Share
 
Risc (C.1.1 ... )
 
 
Isp (B.5.2 ... )
 
 
VHDL (B.6.3 ... )
 
 
VLSI (Very Large Scale Integration) (B.7.1 ... )
 
Would you recommend this review?
yes
no
Other reviews under "Risc": Date
Reduced Instruction Set Computer--RISC--architecture
Tabak D., John Wiley & Sons, Inc., New York, NY, 1987. Type: Book (9789780471913023)
Feb 1 1988
A perspective on the 801/Reduced Instruction Set Computer
Hopkins M. IBM Systems Journal 26(1): 107-121, 1987. Type: Article
Feb 1 1988
The design and development of SPARC (videotape)
Patterson D., Rosing W., University Video Communications, Stanford, CA, 1989. Type: Book
Oct 1 1990
more...

E-Mail This Printer-Friendly
Send Your Comments
Contact Us
Reproduction in whole or in part without permission is prohibited.   Copyright 1999-2024 ThinkLoud®
Terms of Use
| Privacy Policy