This book is an outgrowth of the notes the authors developed for their tutorial on built-in test at the International Test Conference. It can serve as a handbook for experienced professional test engineers, an introduction for engineering managers, or a graduate-level text. Some logic design and statistical background are assumed.
The authors have collected all the relevant topics relating to random and pseudorandom built-in test. The book is primarily a survey of known and available techniques, and the depth and mathematical rigor of the treatment varies from topic to topic.
Chapters 1 and 2 are introductory material used to motivate and set a standard for built-in test. Chapter 1 describes and discusses the problems with conventional testing in light of the growth in complexity of digital circuits, and chapter 2 reviews the principles of design for testability as a point of departure for what follows.
The book continues with four chapters on test sequence generation and response data compression. In chapter 3, on pseudorandom sequence generators, the mathematics of shift-register sequences is developed to show its interesting and useful properties for built-in testing. Chapter 4 introduces various data compression methods, emphasizing a comparison between their information loss characteristics, and chapter 5 expands upon the most useful of these compression methods--the use of polynomial dividers. The section concludes with chapter 6, which examines certain unique shift-register sequence generators that have applications in special situations requiring the use of built-in testing.
Chapter 7 covers the concept of random pattern testing and the problem of assessing the efficiency of such tests in detecting faults in combinational and sequential digital circuits in detail. The treatment extends to memory testing, the problem of detecting intermittent faults, and random pattern tests for delay faults.
Some of the physical concepts that have been used or proposed are described comparatively in chapter 8, both to show what is achievable in built-in testing and as a guideline for future innovation. Chapter 9 discusses the limitations of built-in testing and some of its practical concerns. Finally, chapter 10 describes the test support systems needed for a successful built-in test.
The book starts out with a good discussion of the need for a testable design. This is followed by a survey of the current ad hoc design-for-testability (DFT) techniques (e.g., logic partitioning, clock isolation, and the use of test points), structured techniques (e.g., level-sensitive scan design, random-access scan, and scan path), built-in test techniques, and measures for testability (e.g., controllability and observability).
The next four chapters contain a detailed mathematical treatment of pseudorandom sequence generators, data compression techniques (especially using polynomial dividers), and implementations of these approaches. The chapters are laid out in a theorem/proof format, which serves as a sound basis for subsequent concepts that require a clear understanding of the basics. An example of a basic concept is the use of polynomials (and error polynomials) to represent binary data, while an example of a subsequent topic that requires knowledge of these polynomials is signature analysis, which makes use of error (or difference) polynomials. Example circuits are used very effectively to illustrate each new concept.
The next part of the book treats issues of controllability, observability, and the generation of effective test patterns in a procedural (rather than a proof-oriented) manner. Techniques for evaluating the effectiveness of random and pseudorandom test patterns are presented since random patterns are an efficient, cost-effective way of covering the majority of faults with the first few vectors of a test program. Again, some mathematics and several example circuits are used very effectively to aid the reader’s comprehension of the concepts.
The final chapters are a collection of topics that relate to some combination of what was presented in the earlier chapters. The coverage of the book broadens at this point to include examples from off-the-shelf components, special structures that combine simpler concepts in an innovative fashion, and requirements for test equipment to utilize these on-chip structures effectively. The discussions are up-to-date and give the reader a comprehensive knowledge of the state of the art.
The references are extensive, and the index is long enough to be useful. There is also a useful appendix listing primitive polynomials up to degree 300.
