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Digital computer arithmetic datapath design using Verilog HDL
Stine J., Kluwer Academic Publishers, Norwell, MA, 2004. 224 pp. Type: Book (9781402077104)
Date Reviewed: Sep 27 2004

While there are Web sites available that present arithmetic data path designs, most of the material available online is targeted to very high speed integrated circuit hardware description language (VHDL). There is, therefore, a need for a systematic presentation of Verilog designs for arithmetic data paths. This book fulfills that role. It is surprising how, in around 200 pages, the author has succeeded in providing an almost complete overview of the state of the art in arithmetic data path design. Stine’s coverage excludes finite field arithmetic and floating point arithmetic design, however; covering the former would require an entire book by itself, and the latter can essentially be thought of as an extension to the fixed point arithmetic modules presented in the book, in the sense that the core computing elements can be reused. For example, a floating point multiplier adds denormalization/normalization control logic to an already existing fixed point multiplier.

The book begins with a surprisingly unconvincing motivation chapter, which is fortunately very short. Following this is a succinct introductory chapter for Verilog. This is by no means a tutorial, but is just a reminder of the basic facts and particular constructs that are used in the following chapters. The next three chapters follow the Basic arithmetic operations: addition, multiplication, and division. In chapter 3, on addition, the designs of the regular ripple carry, carry skip, and carry select adders are presented. No theoretical developments are included though; as the author states in his introduction, this is left to computer arithmetic references, for example Ercegovac and Lang’s book [1].

Most designers will never design an adder or a multiplier, these being readily available in most electronic design automation (EDA) tools libraries for both application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs) (in some top-of-the-line FPGAs, multipliers come as hardware building blocks; there isn’t even a need for a library element). It is, nevertheless, really very helpful to know how these operate, and how they are designed. In that respect, chapter 4, on multipliers, is even more valuable, since multipliers are the workhorses of almost all number crunchers. Chapter 4 covers most of the essential designs: carry-save array multipliers, tree multipliers (including the Wallace tree used in many ASIC libraries, and the good old Dadda multiplier), radix-4 Booth multipliers, and even signed digit-based multipliers and truncated multipliers (cherished by many digital signal processing (DSP) hardware designers).

The division chapter, chapter 5, is devoted to recurrence-based division designs. Although the designs presented are very useful and important (radix-2, 4, and 16), the pure array dividers would also be a nice addition to the divider topic. Chapter 6, on elementary functions, and chapter 7, on multiplicative-based division, are what make this book stand far above the average level of computer hardware books. In chapter 6, the author discusses the design of table look-up approximation methods, piecewise approximations, bipartite table methods, and, of course, CORDIC. Chapter 7 presents two core designs, Newton-Raphson reciprocal approximation for division, and the powerful multiplicative-divide convergence method.

An included CD containing all of the Verilog code discussed, as well as test benches for the designed modules, adds even more value to the book.

In summary, this is a well-written book, with carefully selected material, and is highly recommended for classes in computer arithmetic and Verilog, as well as for practicing engineers.

Reviewer:  Vladimir Botchev Review #: CR130185 (0505-0525)
1) Ercegovac, M.D.; Lang, T. Digital arithmetic. Morgan Kaufmann, San Francisco, CA, 2003.
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High-Speed Arithmetic (B.2.4 )
 
 
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