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Test generation for digital systems
Abraham J., Agarwal V., Prentice-Hall, Inc., Upper Saddle River, NJ, 1986. Type: Book (9789780133082302)
Date Reviewed: Oct 1 1987

This is a nicely written piece surveying the literature in test generation techniques. The D-algorithm, a classical approach, is covered along with the new random testing and signature analysis techniques. A background in digital systems is necessary for the reader to appreciate the complexity of test generation. Readers familiar with digital system design can read this paper with ease.

There are a few typographical errors in the paper:

  • (1) P. 52, Fig. 1.5.1(b): No D value is being propagated.

  • (2) P. 69: The authors use M and italicized m for tree structures. What are these? How are they related to the tree structure? An example would be helpful.

  • (3) P. 72: The formula for L needs fixing. The authors propose that the answer for L is 3 × 2n, while their figures imply it is −3 × 2n.

  • (4) P. 85: Ref. REDD83: The word Test is printed as Est.

The references are quite good. An excellent source that is not mentioned is a book by Lala [1].

The paper serves its purpose of familiarizing the reader with all the techniques for general- and special-purpose circuitry. It is very suitable for students beginning graduate-level work.

Reviewer:  Shishpal Rawat Review #: CR111153
1) Lala, P. K.Fault tolerant and fault testable hardware design, Prentice-Hall, Englewood Cliffs, NJ, 1985. See <CR> Rev. 8511-1001.
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