This is not just a book on Design For Testability (DFT); it is a plea for the importance of using DFT in all stages of design. In particular, it advocates In-System At-Speed Testability (ISAST) as the solution to testing and diagnosis problems at each level of design, from system to device.

The problem with what the author calls “conventional testing” is how to get access to ever larger circuits with a limited number of input/output ports, using last-generation automatic test equipment that cannot apply input patterns at the operational speed of the circuit to be tested. The solution is to incorporate additional circuitry to facilitate testing.

Most of the book is concerned with how and where to add this additional circuitry. The author begins with the concept of connecting the sequential elements in the circuit into a shift register. He describes and analyzes many of the implementatiojs of this concept suggested in the literature. However, just considering the chip in isolation is not enough for full system testability. The input/output ports of the devices in the system must be switchable so that a device can be isolated from others. The author’s next chapter describes how to do this. This chapter suggests the increasingly popular and important boundary scan concept [1], which has been developed since the writing of the book.

Using scan design is just the first step; the test for the circuit must now be generated, and the response of the circuit to the test must be captured. Because of I/O pin limitations and the need for at-speed testing, the patterns should be generated in-system. The next chapter describes pattern generation and response compression techniques. Again, only being concerned with single chips is not enough. To allow diagnosability at the system level, the devices must be isolatable so that errors are not propagated across device boundaries. The next chapter, Isolation and Self-Sufficiency, discusses this. This is important since diagnosability is a big problem in current built-in self-test schemes.

The next chapter describes software support tools for testing, mostly test generators and simulators. This is not essential to the discussion, and it is covered better in other books, such as [2].

The last three chapters offer a free-ranging discussion of how to reduce overhead of DFT techniques, a survey of some testing issues, and a look into the future. Three appendices are included, giving some background in logic design, a detailed discussion of timing for scan design techniques, and a study of pattern generators and pattern compressors.

This book offers the most complete coverage that I have seen of DFT techniques; it does not stop at the chip level, but extensively covers system test and diagnosis issues. I think it is a must reading for those interested in or committed to DFT. Unfortunately, it is written from the perspective of someone who is intensely committed to DFT. It does not address the short-term design concerns of DFT in regard to circuit overhead and timing. I do not think it is a book to give to someone uncommitted or hostile to DFT.

The pluses of this book include many thought-provoking sections on the influence of DFT techniques on system test and structure, the future of high-level testing and test equipment, and an appreciation of the importance of many factors not usually covered by a shallower presentation. Another great plus is an extensive bibliography, taking up 100 pages of small print, that lists most of the papers and books on testing that have appeared. I have already found this bibliography useful, and I feel that it alone is worth the price of the book.

Unfortunately, there are some shortcomings, most of which are stylistic. The author loves italics, and he also loves to invent new acronyms. What is usually called the Circuit Under Test (CUT) or Unit Under Test (UUT) here is called the Object to be Tested, abbreviated as the clumsy OtbT. Other new acronyms are LSA for Latch Scanning Arrangement, ISAST (In-System At-Speed Testing), IsSS (Isolation and Self-Sufficiency), and many more. The reader is reminded of the meaning of these acronyms at least once per chapter, which is of help, but I find that they interrupt the flow of the text.

Finally, many of the author’s points are made again and again. Some judicious restructuring could have shortened the book without eliminating any of the valuable information and observations.

In summary, while this is not a book for the beginner, I think it is essential for anyone seriously interested in implementing or studying DFT techniques.