This paper addresses the problems associated with large caches, and the fact that some workloads do not necessarily benefit from them. The authors propose reconfiguring part of the cache as a processing unit for multimedia applications. A study shows that this technique results in superior performance and power saving, as compared with a base superscalar processor.

From the methodology described in the paper, it appears that the base superscalar processor did not have any power saving features, but recent processors often have some power saving capabilities. Therefore, it would be interesting to compare the proposed scheme with one such processor. The authors mention that, due to the additional complexity, the power increases, but the significant reduction of the number of instructions being executed, and the lower processor resource utilization, compensates for the additional power consumption.

The authors distinguish their work from previous works by emphasizing that they investigate a variety of cache configurations, but the paper shows only one set of results. This leaves the reader wondering if the investigation of the effects of cache configuration is really one of the contributions of this paper. While the paper’s length is appropriate, the legends for the figures are hard to read.